Motorola 68HC11 SCI Interface

The Motorola 68HC11 supports one SCI. We'll discuss both transmitting and receiving ends of the SCI. The programmer controls the operation of the SCI interface through a set of hardware registers that are memory mapped into the processor's address space. There are 5 control registers shown below in figure 25. This figure also shows the logical names for individual bits in the registers. The BAUD register is used to set the serial link's baud rate. There are two control registers SCCR1 and SCCR2 that specify how the SCI should work. There is a status register, SCSR that the programmer can use to check whether the transmission/reception of a frame has been completed. Finally there is the data register SCDR that holds the transmitted or received information bits.

Figure 25: 68HC11 SCI Registers

From the number of control bits in the SCCR1 and SCCR2 registers you can see that the programmer has quite a bit of control over the SCI interface. Most of the situations we'll be using, however, have standard set-ups so we won't need to discuss the control register bits in detail. Instead, we'll provide standard functions that encapsulate the user's interface to SCI devices such as a personal computers and simply discuss how these functions work. The proper setup of the SCI subsystem is usually done in your program's init() initialization routine.

To understand how the SCI subsystem works, let's examine figure 26. Figure 26 shows how the programmer interacts with the SCI transmit and receive buffers. In order to transmit, the programmer first loads the 8-bit data register SCDR with the data to be sent. The SCI module automatically fills in the start bit, stop bit, and the extra T8 bit from control register SCCR1. The T8 bit can be used as a parity bit. Once the SCDR register is loaded, the subsystem loads this data into the SCI module's transmit buffer. The SCI transmit buffer then holds a single frame and this frame is then clocked out of the transmit register one bit at a time at the rate specified in the BAUD register. Once all of the bits have been clocked out of the transmit buffer, the SCI module sets the TDRE (transmit data register empty) bit in the SCI's status register SCSR. This single bit can then be used to check whether or not the frame has been successfully transmitted.

Figure 26: SCI transmit and receive buffers

A similar set of steps can be used to check and see if the receive data register has been filled. Once initialized, the receive data component of the SCI subsystem will wait for the true-to-false transition on the input line signalling a start bit. After the start bit has been detected, the receive subsystem will shift in 10 or 11 bits into the receive data register. The start and stop bits are removed and 8 bits of data are loaded into the SCI data register SCDR. The ninth parity bit R8 is put in the SCCR1 control register. When the receive data register is full, then the SCI subsystem sets the RDRF (receive data register full) flag in the status register SCSR. The programmer can then check this status flag to see if a full frame has been received.

The following code segment from an init() function can be used to initialize the SCI module to transmit and receive at 38 kbaud. This setup was used in our earlier kernel.c functions to send characters back and forth between the MicroStamp11 and the PC.

  void init(void){
    asm(" sei");
      CONFIG = 0x04;
      BAUD=BAUD38K;
      SCCR1 = 0x00;
      SCCR2 = 0x0C;
    asm(" cli");
  }

The instructions in this function do the following. The first instruction CONFIG = 0x04 turns off the micro-controller's watchdog timer. The second instruction BAUD=BAUD38K sets the SCI subsystem's baud rate to 38 kilo-baud. The variable BAUD38K is a logical name whose actual value will be found in hc11.h. The next two lines set up the SCI subsystem's parameters. By zeroing SCCR1, we are ignoring the parity bit and creating a 10-bit frame. By setting SCCR2=0x0C, we've disabled all transmit and receive interrupts and we've enabled the transmit and receive modules in the SCI subsystem.

Note that the SCI module has hardware interrupts associated with the hardware events

• Transmission Complete (TC): which is set when the transmit shift register is empty.
• Transmit Data Register Empty (TDRE): which is set when the transmit data register is empty.
• Receive Data Register Full (RDRF): which is set when the receive data register is full.
• Idle line (ILIE): which is when the receive module detects an idle line.

These hardware interrupts can be used to do parity-bit processing on a transmitted or received frame. In our particular examples, however, we assume no parity checking so these interrupts have been disabled.

As specific examples of how the SCI interface can be used, we consider the two function InChar() and OutChar(). These functions are used to receive and transmit, respectively, a single byte (frame) of data.

  void OutChar(char data){
    while((SCSR & TDRE) == 0);
    SCDR=data;
  }

  void InChar(void){
    while((SCSR & RDRF) == 0);
    return(SCDR);
  }

The first function, OutChar() transmits a single byte. The function simply waits in a loop until the TDRE bit (transmit data register empty) is set. Once this is done, we know that any previously loaded bytes have been successfully shifted out of the transmit data register. The function then reloads the SCI's data register SCDR with the new data. The other function InChar() receives a single byte. The function waits in a while loop until the RDRF bit (receive data register full) is set, thereby indicating that 8-bits of have been shifted into the receive data register. Once this is done, the function returns a pointer to the SCDR data register.